PLD/FPGA Workshop 1.5

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Starts Organizer
Tue 25 Jun 2013 19:00
Ends Event Owner
Tue 25 Jun 2013 21:00 User:Skmp

Switches! Lots of them!

we'll actually split into teams and all, so we'll really need the laptops this time around

slides are in github

Computer architecture

  • ISA Design
    • Some stuff about typical ISA design
    • ALU
    • Branching
    • Registers/Load store/etc
  • ISA Implementation
    • Pipeline description
  • Memory interfaces
    • MMIO/MMR
  • Hands on stuff !
    • Implement a simple assembler (hopefully we'll have some of it ready from the study work)
    • Implement flow control
    • Port the cpu to verilog
    • Extend the assembler for flow control
  • Think together a custom, minimal SoC
    • We'll actually implement this later on :)

Check the code in

For study

  • Implement an assembler that accepts assembly in a nice, text format and outputs C code for it
  • Modify tiny.cpp to read external binary files
  • modify the assembler to generate binary files

Example assembly format

   //this is a commend and is ignored
   mov r0,1
   add r0,r1,r2
   add r0,r2 //this is a shorthand for add r0,r0,r2
   print r0

Also checkout The main page