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|what=PLD/FPGA Workshop 2.12
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
586 B (75 words) - 22:27, 15 January 2014
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* FPGA
37 KB (1,823 words) - 15:06, 20 May 2015
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|what=PLD/FPGA Workshop 1.2
1 KB (152 words) - 02:11, 4 June 2013
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|what=PLD/FPGA Workshop 1.1
1 KB (153 words) - 04:16, 29 May 2013
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|what=PLD/FPGA Workshop 1.3
772 B (101 words) - 19:41, 23 June 2013
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|what=PLD/FPGA Workshop 1.4
1 KB (162 words) - 19:40, 23 June 2013
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|what=PLD/FPGA Workshop 1.6
1 KB (191 words) - 20:34, 28 June 2013
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|what=PLD/FPGA Workshop 1.5
1 KB (214 words) - 19:38, 23 June 2013
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|what=PLD/FPGA Workshop 2.0
1 KB (205 words) - 02:35, 23 September 2013
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|what=PLD/FPGA Workshop 2.1
849 B (113 words) - 15:17, 17 September 2013
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|what=PLD/FPGA Workshop 2.2
908 B (123 words) - 14:37, 27 September 2013
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|what=PLD/FPGA Workshop 2.3
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
800 B (107 words) - 14:18, 3 October 2013
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|what=PLD/FPGA Workshop 2.4
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
690 B (90 words) - 14:25, 3 October 2013
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|what=PLD/FPGA Workshop 2.5
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
887 B (119 words) - 01:26, 17 October 2013
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|what=PLD/FPGA Workshop 2.6
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
896 B (123 words) - 00:40, 24 October 2013
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|what=PLD/FPGA Workshop 2.7
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
938 B (125 words) - 12:00, 31 October 2013
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...ce.gr/wiki/index.php?title=Special%3ASearch&search=FPGA&go=Go PLD/FPGA PLD/FPGA workshops]
2 KB (196 words) - 15:10, 30 October 2013
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|what=PLD/FPGA Workshop 2.8
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
1 KB (150 words) - 23:22, 13 November 2013
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|what=PLD/FPGA Workshop 2.9
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
657 B (85 words) - 23:30, 13 November 2013
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|what=PLD/FPGA Workshop 2.10
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
660 B (88 words) - 14:21, 30 November 2013
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|what=PLD/FPGA Workshop 2.11
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
646 B (82 words) - 16:59, 9 December 2013
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|what=PLD/FPGA Workshop 2.13
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
596 B (78 words) - 03:19, 28 January 2014
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|what=PLD/FPGA Workshop 2.14
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
592 B (75 words) - 14:15, 5 February 2014
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|what=PLD/FPGA Workshop 2.15
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
583 B (75 words) - 13:12, 21 February 2014
