Simple SoC

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Revision as of 21:31, 9 October 2013 by Skmp (Talk | contribs)

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Description

A very basic, custom SoC softcore


Primary git repo: on github

Specs/Design: on github as well

We'll merely keep a meetup log and notes here, important stuff will be stored in One Single Repo (tm), next to the code :)

Meetups

Upcoming

2013/10/16 - How about conditional branches?

  • Implement jump logic
  • Test mem read/writes
  • see about vram

Log

2013/10/09 - Howdy Simulator, for real

  • debug, debug, debug, and simulate
  • Implemented more state logic
  • cpu mostly works, needs some more opcodes!

2013/10/02 - Howdy Simulator

  • Implemented ram
  • Added delays for ram

2013/09/25 - Verilog at last

  • Spec now has vsync
  • Reviewed sdlcore code
  • Hacked together some very basic Verilog

2013/09/18 - Let there be code

  • Debugged & Finished sdlcore implementation

2013/09/11 - September reunion

  • Discuss and improve specs a bit
  • Update documentation and C# ref. implementation
  • forked from Programmable Logic Lessons to Simple SoC

Resources