Difference between revisions of "Programmable Logic Lessons"

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=== Description ===
 
=== Description ===
Basic introduction into fpgas and stuff (still thinking on the actual content, we'll start from the very very very basics)
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Basic introduction into fpgas (and digital logic). This will have a lot of new stuff if you are a total begginer, you'll have to study abit to keep up :)
  
(i'll fill this in with useful input asap, subscribe to the mailing list if you want to be notified for updates)
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The plan is to have 3 introductory sessions, and then get into more hands on things. Hopefully we'll have our own (tiny and minimal) working cpu by the end of this !
 +
 
 +
The schedule will be adapted as we go on -- this is a rough plan
 +
 
 +
=== Prerequisite knowledge and skills ===
 +
* Basic understanding of programming
 +
* Basic knowledge of git (http://githowto.com/ can help you, we'll use git for examples and collaborating)
 +
* Github account (We'll host our stuff there)
 +
* A laptop (We do have some some spare computers in hackerspace, but you'll need to work on your own at home)
  
 
=== Doodle pool for date selection ===
 
=== Doodle pool for date selection ===
http://www.doodle.com/yp99tnvzvq7ygwmy#table -> Tuesday, May 28, 2013 7:00 PM - 9:00 PM
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http://www.doodle.com/yp99tnvzvq7ygwmy#table -> Begining Tuesday, May 28, 2013 7:00 PM - 9:00 PM, and generally Tuesdays 7 - 9
 +
 
 +
 
 +
=== Schedule ===
 +
==== [[PLD_Workshop_28_05_2013|Digital electronics recap (click for slides)]] ====
 +
* Welcome to hackerspace.gr !
 +
* Fast recap of digital electronics basics
 +
* Workshop page includes slides and useful links :)
 +
 
 +
==== [[PLD_Workshop_04_06_2013|Tooling, VHDL/Verilog basics (click for slides)]] ====
 +
* Xilinx tooling (we'll use it)
 +
** http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools.html (*ISE*, _not_ Vivado)
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* VHDL & Verilog introduction
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** Design goals, short history
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* Verilog syntax & examples
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** We'll do some hands on basic stuff on our h/w !
 +
 
 +
==== [[PLD_Workshop_11_06_2013|More complicated structures (click for slides)]] ====
 +
* More digital design stuff
 +
** Clocked vs clockless/asynchronous design
 +
** Clock domains, etc
 +
** Buffers, fifo, pipelines, etc
 +
** We'll Implement something relevant to avoid too much boring theory
 +
 
 +
==== [[PLD_Workshop_18_06_2013|Computer architecture (click for slides)]] ====
 +
* Introduction
 +
* Implement a very basic cpu
 +
* think together something more complicated for later on
 +
 
 +
==== [[PLD_Workshop_25_06_2013|Computer architecture, part 2 (click for slides)]] ====
 +
* talk about ISAs
 +
* More work on the design we have
 +
* play a bit with porting to verilog ?
 +
 
 +
==== [[PLD_Workshop_02_07_2013|Computer architecture, part 3 (just workshop, no slides)]] ====
 +
* Brainstorming on exactly what we'll implement
 +
* Perhaps port the design to verilog ?
 +
* Look at the assembler and all :)
  
 
=== Hardware ===
 
=== Hardware ===
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* Xilinx Spartan 3E/500K gates
 
* Xilinx Spartan 3E/500K gates
  
=== Schedule ===
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Atlys - Spartan6 - http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,836&Prod=ATLYS&CFID=1733993&CFTOKEN=46850973
==== Digital electronics recap ====
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* has cute hdmi output
Binary system, Bool algebra, Basic constructs, φ
+
  
==== Tooling, VHDL/Verilog basics ====  
+
=== Slides ===
 +
https://github.com/pld-lessons/slides
  
==== More complicated structures ====
 
(mux, luts, more details on clocks)
 
 
==== Plan more ? ====
 
  
 
=== Related material ===
 
=== Related material ===
http://hamsterworks.co.nz/mediawiki/index.php/FPGA_course
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* http://www.doe.carleton.ca/~jknight/97.478/PetervrlK.pdf (Verilog introduction)
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* http://hamsterworks.co.nz/mediawiki/index.php/FPGA_course (VHDL, we'll actually do verilog though)
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 +
 
 +
 
  
 
=== Useful Links ===
 
=== Useful Links ===
* http://en.wikipedia.org/wiki/Programmable_logic_device
 
* http://en.wikipedia.org/wiki/Field-programmable_gate_array
 
 
* http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools.html (*ISE*, _not_ Vivado)
 
* http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools.html (*ISE*, _not_ Vivado)
 +
* https://github.com/skmp/tsc8 (A tiny cpu I implemented in vhdl a long time ago)
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* http://opencores.org/ (Lots and lots of code you can stare at)
  
  
=== Contact ===
 
  
 +
 +
=== Contact ===
 
Μέσω της [http://discuss.hackerspace.gr/ λίστας γενική συζήτησης] βάζοντας το label [PLD-Lessons] στην αρχή του subject.
 
Μέσω της [http://discuss.hackerspace.gr/ λίστας γενική συζήτησης] βάζοντας το label [PLD-Lessons] στην αρχή του subject.
  
 
[[Category:Seminars]]
 
[[Category:Seminars]]
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[[Category:Projects]]

Latest revision as of 00:15, 13 June 2018

Description

Basic introduction into fpgas (and digital logic). This will have a lot of new stuff if you are a total begginer, you'll have to study abit to keep up :)

The plan is to have 3 introductory sessions, and then get into more hands on things. Hopefully we'll have our own (tiny and minimal) working cpu by the end of this !

The schedule will be adapted as we go on -- this is a rough plan

Prerequisite knowledge and skills

  • Basic understanding of programming
  • Basic knowledge of git (http://githowto.com/ can help you, we'll use git for examples and collaborating)
  • Github account (We'll host our stuff there)
  • A laptop (We do have some some spare computers in hackerspace, but you'll need to work on your own at home)

Doodle pool for date selection

http://www.doodle.com/yp99tnvzvq7ygwmy#table -> Begining Tuesday, May 28, 2013 7:00 PM - 9:00 PM, and generally Tuesdays 7 - 9


Schedule

Digital electronics recap (click for slides)

  • Welcome to hackerspace.gr !
  • Fast recap of digital electronics basics
  • Workshop page includes slides and useful links :)

Tooling, VHDL/Verilog basics (click for slides)

More complicated structures (click for slides)

  • More digital design stuff
    • Clocked vs clockless/asynchronous design
    • Clock domains, etc
    • Buffers, fifo, pipelines, etc
    • We'll Implement something relevant to avoid too much boring theory

Computer architecture (click for slides)

  • Introduction
  • Implement a very basic cpu
  • think together something more complicated for later on

Computer architecture, part 2 (click for slides)

  • talk about ISAs
  • More work on the design we have
  • play a bit with porting to verilog ?

Computer architecture, part 3 (just workshop, no slides)

  • Brainstorming on exactly what we'll implement
  • Perhaps port the design to verilog ?
  • Look at the assembler and all :)

Hardware

Papilio One - 500K - https://www.sparkfun.com/products/11158

  • Xilinx Spartan 3E/500K gates

Atlys - Spartan6 - http://www.digilentinc.com/Products/Detail.cfm?NavPath=2,400,836&Prod=ATLYS&CFID=1733993&CFTOKEN=46850973

  • has cute hdmi output

Slides

https://github.com/pld-lessons/slides


Related material



Useful Links



Contact

Μέσω της λίστας γενική συζήτησης βάζοντας το label [PLD-Lessons] στην αρχή του subject.