Difference between revisions of "PLD Workshop 2013/10/30"

From Hackerspace.gr
Jump to: navigation, search
 
Line 20: Line 20:
  
 
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
 
''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]''
 +
 +
==== aftermath ====
 +
* Had no luck actually locating the vga corruption bug
 +
* simulator results and simpler test cases seem to work fine
 +
* implemented wait
  
 
==== ideas for the workshop ====
 
==== ideas for the workshop ====

Latest revision as of 12:00, 31 October 2013

Simple soc logo.jpg

[Hackerspace.gr external link]
Starts Organizer
Wed 30 Oct 2013 19:30 Hackerspace.gr
Ends Event Owner
Wed 30 Oct 2013 21:30 User:Skmp

Corrupted Pixels




Stuff for review

sdlcore @ github

verilog WIP @ github

aftermath

  • Had no luck actually locating the vga corruption bug
  • simulator results and simpler test cases seem to work fine
  • implemented wait

ideas for the workshop

  • Investigate the vram/vga display corruptions
  • Try out some simpler programs to isolate the issues
  • take pictures
  • think ways to update the program
  • cleanup repo ?


Also checkout The main project page