Difference between revisions of "PLD Workshop 2013/10/02"
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''sdlcore @ [https://github.com/pld-lessons/simple_soc/blob/master/src/sdlcore/core.cpp github]'' | ''sdlcore @ [https://github.com/pld-lessons/simple_soc/blob/master/src/sdlcore/core.cpp github]'' | ||
| − | ''verilog WIP @ | + | ''verilog WIP @ [https://github.com/pld-lessons/simple_soc/tree/master/src/fpga/verilog_core github]'' |
==== Todo ==== | ==== Todo ==== | ||
Revision as of 14:51, 2 October 2013
 [Hackerspace.gr external link] |
Starts | Organizer |
|---|---|---|
| Wed 02 Oct 2013 19:30 | Hackerspace.gr | |
| Ends | Event Owner | |
| Wed 02 Oct 2013 21:30 | User:Skmp |
Howdy Simulator
Stuff for review
sdlcore @ github
verilog WIP @ github
Todo
- Cleanup and upload verilog code [skmp]
- Modularize the code so it synthesizes faster [skmp]
Plans for the workshop
- Work a bit on the verilog code
- Load example program
- Simulate it
- Attach vga logic
Also checkout The main project page
